logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9640635 B1

PDFFull Text
Date of Patent:
May. 02, 2017

Filed:

Aug. 21, 2015

Reliability in mergeable semiconductor devices

Applicants:

Zhihong Zhang, Chandler, AZ (US);

Daniel J. Blomberg, Chandler, AZ (US);

Hongning Yang, Chandler, AZ (US);

Jiang-kai Zuo, Chandler, AZ (US);

Inventors:

Zhihong Zhang, Chandler, AZ (US);

Daniel J. Blomberg, Chandler, AZ (US);

Hongning Yang, Chandler, AZ (US);

Jiang-Kai Zuo, Chandler, AZ (US);

Assignee:

NXP USA, INC., Austin, TX (US);

Attorney:

Rajeev Madnawat

Primary Examiner:

Marcos D Pizarro

Assistant Examiner:

Nelson Garces

Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/01 (2006.01); H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H01L 21/265 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 21/8234 (2006.01); H01L 29/36 (2006.01); H01L 27/088 (2006.01); H01L 21/761 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66659 (2013.01); H01L 21/26513 (2013.01); H01L 21/823481 (2013.01); H01L 29/0642 (2013.01); H01L 29/0847 (2013.01); H01L 29/1045 (2013.01); H01L 29/1095 (2013.01); H01L 29/6659 (2013.01); H01L 29/66575 (2013.01); H01L 29/786 (2013.01); H01L 29/7833 (2013.01); H01L 29/7835 (2013.01); H01L 29/78615 (2013.01); H01L 29/78624 (2013.01); H01L 29/78654 (2013.01); H01L 21/761 (2013.01); H01L 21/76224 (2013.01); H01L 21/823418 (2013.01); H01L 27/088 (2013.01); H01L 29/0653 (2013.01); H01L 29/36 (2013.01);
Abstract

A method of fabricating a transistor device having a channel of a first conductivity type formed during operation in a body region having a second conductivity type includes forming a first well region of the body region in a semiconductor substrate, performing a first implantation procedure to counter-dope the first well region with dopant of the first conductivity type to define a second well region of the body region, and performing a second implantation procedure to form a source region in the first well region and a drain region in the second well region.

Find Patent Forward Citations

Loading…