The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9613856 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 04, 2017

Filed:

Sep. 18, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Shin-Yi Yang, New Taipei, TW;

Ming-Han Lee, Taipei, TW;

Shau-Lin Shue, Hsinchu, TW;

Tz-Jun Kuo, Hsinchu County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/528 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76864 (2013.01); H01L 21/76805 (2013.01); H01L 21/76816 (2013.01); H01L 21/76865 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/5329 (2013.01); H01L 23/53238 (2013.01); H01L 29/42376 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A method of fabricating a semiconductor device is disclosed. The method includes forming a first conductive feature over a substrate, forming a dielectric layer over the first conductive feature, forming a trench in the dielectric layer, forming a first barrier layer in the trench, applying a thermal treatment to convert a first portion of the barrier layer to a second barrier layer, exposing the first conductive feature in the trench while a portion of the second barrier layer is disposed over the dielectric layer and forming a second conductive feature in the trench.


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