The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 28, 2017
Filed:
May. 25, 2012
Chun Hui Yu, Zhubei, TW;
Kuo-chung Yee, Taoyuan, TW;
Chen-hua Yu, Hsin-Chu, TW;
Yeong-jyh Lin, Caotun Township, TW;
Chia-hsiang Lin, Zhubei, TW;
Liang-ju Yen, Zhubei, TW;
Lawrence Chiang Sheu, Hsinchu, TW;
Chun Hui Yu, Zhubei, TW;
Kuo-Chung Yee, Taoyuan, TW;
Chen-Hua Yu, Hsin-Chu, TW;
Yeong-Jyh Lin, Caotun Township, TW;
Chia-Hsiang Lin, Zhubei, TW;
Liang-Ju Yen, Zhubei, TW;
Lawrence Chiang Sheu, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method of forming interconnects for three dimensional integrated circuits comprises attaching a metal layer on a first carrier, attaching a first side of a packaging component on the metal layer, wherein the packaging component comprises a plurality of through vias. The method further comprises filling the plurality of through vias with a metal material using an electrochemical plating process, wherein the metal layer functions as an electrode for the electrochemical plating process, attaching a second carrier on a second side of the packaging component, detaching the first carrier from the packaging component, forming a photoresist layer on the metal layer, patterning the photoresist layer and detaching exposed portions of the metal layer.