The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 13, 2016
Filed:
Mar. 13, 2013
Weng Hong Teh, Phoenix, AZ (US);
Emile Davies-venn, Gilbert, AZ (US);
Ebrahim Andideh, Tempe, AZ (US);
Digvijay A. Raorane, Chandler, AZ (US);
Daniel N. Sobieski, Phoenix, AZ (US);
Weng Hong Teh, Phoenix, AZ (US);
Emile Davies-Venn, Gilbert, AZ (US);
Ebrahim Andideh, Tempe, AZ (US);
Digvijay A. Raorane, Chandler, AZ (US);
Daniel N. Sobieski, Phoenix, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Bumpless build-up layer (BBUL) semiconductor packages with ultra-thin dielectric layers are described. For example, an apparatus includes a semiconductor die including an integrated circuit having a plurality of external conductive bumps. A semiconductor package houses the semiconductor die. The semiconductor package includes a dielectric layer disposed above the plurality of external conductive bumps. A conductive via is disposed in the dielectric layer and coupled to one of the plurality of conductive bumps. A conductive line is disposed on the dielectric layer and coupled to the conductive via.