The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2016

Filed:

May. 15, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Cheng-Hsiung Tsai, Zhunan Township, TW;

Chung-Ju Lee, Hsin-Chu, TW;

Tsung-Jung Tsai, Taipei, TW;

Hsiang-Huan Lee, Jhudong Township, TW;

Ming-Han Lee, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/7682 (2013.01); H01L 21/76802 (2013.01); H01L 21/76831 (2013.01); H01L 21/76834 (2013.01); H01L 21/76885 (2013.01); H01L 23/528 (2013.01); H01L 23/5222 (2013.01); H01L 23/5329 (2013.01); H01L 23/53233 (2013.01); H01L 23/53238 (2013.01); H01L 23/53295 (2013.01); H01L 2924/00 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A copper alloy layer is blanket deposited over a low k dielectric layer and in via openings within the low k dielectric layer. The blanket deposited layer is then anisotropically etch to form horizontal interconnects. The interconnects are annealed to form a metal oxide barrier lining. A second low k dielectric layer is then depositing over the horizontal interconnects. Air gaps can be formed between adjacent interconnects to lower parasitic capacitance therebetween.


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