The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2016

Filed:

Jan. 18, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Qing Ma, Saratoga, CA (US);

Jun He, Phoenix, AZ (US);

Patrick Morrow, Portland, OR (US);

Paul B. Fischer, Portland, OR (US);

Sridhar Balakrishnan, Portland, OR (US);

Satish Radhakrishnan, Hillsboro, OR (US);

Tatyana Andryushchenko, Beaverton, OR (US);

Guanghai Xu, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/03 (2006.01); H01L 23/00 (2006.01); B23K 1/00 (2006.01); H05K 3/40 (2006.01); H01L 21/033 (2006.01);
U.S. Cl.
CPC ...
H01L 24/19 (2013.01); B23K 1/0016 (2013.01); H01L 21/0334 (2013.01); H01L 24/11 (2013.01); H05K 3/4015 (2013.01); H01L 2224/245 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/14 (2013.01); H05K 2201/1028 (2013.01);
Abstract

The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.


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