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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9449925 B1

PDFFull Text
Date of Patent:
Sep. 20, 2016

Filed:

Mar. 01, 2013

Integrated passive devices

Applicant:

Stats Chippac, Ltd., Singapore, SG;

Inventors:

Yaojian Lin, Singapore, SG;

Haijing Cao, Singapore, SG;

Qing Zhang, Singapore, SG;

Kang Chen, Singapore, SG;

Jianmin Fang, Shanghai, CN;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:

Robert D. Atkins

Atkins and Associates, P.C.

Primary Examiner:

Shouxiang Hu

Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 27/12 (2006.01); H01L 49/02 (2006.01); H01L 21/683 (2006.01); H01L 23/498 (2006.01); H01L 23/50 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 21/6835 (2013.01); H01L 23/49822 (2013.01); H01L 24/48 (2013.01); H01L 27/1266 (2013.01); H01L 28/00 (2013.01); H01L 28/10 (2013.01); H01L 28/20 (2013.01); H01L 28/40 (2013.01); H01L 23/50 (2013.01); H01L 24/16 (2013.01); H01L 2221/68345 (2013.01); H01L 2224/16 (2013.01); H01L 2924/01004 (2013.01); H01L 2924/01019 (2013.01); H01L 2924/01078 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/04941 (2013.01); H01L 2924/14 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/30105 (2013.01);
Abstract

A semiconductor device has integrated passive circuit elements. A first substrate is formed on a backside of the semiconductor device. The passive circuit element is formed over the insulating layer. The passive circuit element can be an inductor, capacitor, or resistor. A passivation layer is formed over the passive circuit element. A carrier is attached to the passivation layer. The first substrate is removed. A non-silicon substrate is formed over the insulating layer on the backside of the semiconductor device. The non-silicon substrate is made with glass, molding compound, epoxy, polymer, or polymer composite. An adhesive layer is formed between the non-silicon substrate and insulating layer. A via is formed between the insulating layer and first passivation layer. The carrier is removed. An under bump metallization is formed over the passivation layer in electrical contact with the passive circuit element. A solder bump is formed on the under bump metallization.

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