The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 2016

Filed:

Jun. 17, 2014
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Tzu-Heng Wu, New Tapei, TW;

Yi-Hsien Chang, Shetou Township, TW;

Kai-Chih Liang, Zhubei, TW;

Yi Heng Tsai, Hsinchu, TW;

Wei-Cheng Shen, Tainan, TW;

Chun-Ren Cheng, Hsin-Chu, TW;

Chun-Wen Cheng, Zhubei, TW;

Han-Chin Chiu, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81C 3/00 (2006.01); B81B 7/00 (2006.01); H01L 21/762 (2006.01); H01L 23/00 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76232 (2013.01); B81B 7/008 (2013.01); B81C 3/001 (2013.01); H01L 24/89 (2013.01); H01L 27/092 (2013.01); B81B 7/0025 (2013.01); B81B 7/0054 (2013.01);
Abstract

The present disclosure relates to an integrated microsystem with a protection barrier structure, and an associated method. In some embodiments, the integrated microsystem comprises a first die having a plurality of CMOS devices disposed thereon, a second die having a plurality of MEMS devices disposed thereon and a vapor hydrofluoric acid (vHF) etch barrier structure disposed between the first die and the second die. The second die is bonded to the first die at a bond interface region. The vHF etch barrier structure comprises a vHF barrier layer over an upper surface of the first die, and a stress reduction layer arranged between the vHF etch barrier layer and the upper surface of the first die.


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