The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2016

Filed:

Apr. 28, 2011
Applicants:

In-jun Hwang, Hwaseong-si, KR;

Jai-kwang Shin, Anyang-si, KR;

Jae-joon OH, Seongnam-si, KR;

Jong-seob Kim, Hwaseong-si, KR;

Hyuk-soon Choi, Hwaseong-si, KR;

Ki-ha Hong, Cheonan-si, KR;

Inventors:

In-jun Hwang, Hwaseong-si, KR;

Jai-kwang Shin, Anyang-si, KR;

Jae-joon Oh, Seongnam-si, KR;

Jong-seob Kim, Hwaseong-si, KR;

Hyuk-soon Choi, Hwaseong-si, KR;

Ki-ha Hong, Cheonan-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/201 (2006.01); H01L 29/205 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 21/28 (2006.01); H01L 29/10 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/778 (2013.01); H01L 21/28008 (2013.01); H01L 29/1029 (2013.01); H01L 29/201 (2013.01); H01L 29/205 (2013.01); H01L 29/42364 (2013.01); H01L 29/66431 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01); H01L 29/7787 (2013.01); H01L 29/2003 (2013.01);
Abstract

High electron mobility transistors (HEMTs) including lightly doped drain (LDD) regions and methods of manufacturing the same. A HEMT includes a source, a drain, a gate, a channel supplying layer for forming at least a 2-dimensional electron gas (2DEG) channel, and a channel formation layer in which at least the 2DEG channel is formed. The channel supplying layer includes a plurality of semiconductor layers having different polarizabilities. A portion of the channel supplying layer is recessed. One of the plurality of semiconductor layers, which is positioned below an uppermost layer is an etching buffer layer, as well as a channel supplying layer.


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