The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 2016

Filed:

Nov. 06, 2013
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Hsin-Ying Lin, Tainan, TW;

Mei-Yun Wang, Chu-Pei, TW;

Hsien-Cheng Wang, Hsinchu, TW;

Fu-Kai Yang, Hsinchu, TW;

Shih-Wen Liu, Taoyuan, TW;

Audrey Hsiao-Chiu Hsu, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0334 (2013.01); H01L 29/402 (2013.01); H01L 29/42376 (2013.01); H01L 29/4983 (2013.01); H01L 29/6653 (2013.01); H01L 29/6659 (2013.01); H01L 29/66545 (2013.01);
Abstract

Embodiments of mechanisms of a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a metal gate structure formed over the substrate. The semiconductor device structure further includes a funnel shaped hard mask structure formed over the metal gate structure. Formation of voids, which tend to be formed in a rectangular hard mask structure, is prevented. In addition, formation of a self-aligned contact in the semiconductor device becomes easier, and risks of shortage between the contact and a metal gate structure in the semiconductor device decreased. In addition, a method for forming the semiconductor device structure is also provided. The method may include a gate last process.


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