The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 12, 2016

Filed:

May. 20, 2011
Applicants:

Yeonglm Park, Kyoungki-do, KR;

Heejo Chi, Kyoungki-do, KR;

Hyungmin Lee, Kyoungki-do, KR;

Inventors:

Yeonglm Park, Kyoungki-do, KR;

HeeJo Chi, Kyoungki-do, KR;

HyungMin Lee, Kyoungki-do, KR;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 29/40 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 23/36 (2006.01); H01L 23/48 (2006.01); H01L 23/552 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 23/3128 (2013.01); H01L 23/36 (2013.01); H01L 23/481 (2013.01); H01L 23/552 (2013.01); H01L 24/14 (2013.01); H01L 24/17 (2013.01); H01L 25/50 (2013.01); H01L 24/48 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/03452 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/03464 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/0558 (2013.01); H01L 2224/05611 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05639 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/1132 (2013.01); H01L 2224/1145 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/11464 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/11901 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13113 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13124 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/1403 (2013.01); H01L 2224/14051 (2013.01); H01L 2224/14136 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/17051 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/93 (2013.01); H01L 2224/97 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06568 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01047 (2013.01); H01L 2924/01073 (2013.01); H01L 2924/01074 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/19104 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/3011 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A semiconductor device has a substrate and plurality of first semiconductor die having conductive vias formed through the first semiconductor die mounted with an active surface oriented toward the substrate. An interconnect structure, such as bumps or conductive pillars, is formed over the substrate between the first semiconductor die. A second semiconductor die is mounted to the first semiconductor die. The second semiconductor die is electrically connected through the interconnect structure to the substrate and through the conductive vias to the first semiconductor die. An underfill material is deposited between the first semiconductor die and substrate. Discrete electronic components can be mounted to the substrate. A heat spreader or shielding layer is mounted over the first and second semiconductor die and substrate. Alternatively, an encapsulant is formed over the die and substrate and conductive vias or bumps are formed in the encapsulant electrically connected to the first die.


Find Patent Forward Citations

Quick Actions:

Park, Yeonglm. (2016). Semiconductor device and method of forming 3d semiconductor package with semiconductor die stacked over semiconductor wafer (U.S. Patent No. 9391046). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9391046

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