The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 14, 2016
Filed:
Apr. 16, 2014
Applicant:
Unity Semiconductor Corporation, Sunnyvale, CA (US);
Inventors:
Bruce Lynn Bateman, Fremont, CA (US);
Christophe Chevallier, Palo Alto, CA (US);
Darrell Rinerson, Cupertino, CA (US);
Chang Hua Siau, Saratoga, CA (US);
Assignee:
Unity Semiconductor Corporation, Sunnyvale, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 13/00 (2006.01); G11C 7/12 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 13/004 (2013.01); G11C 7/12 (2013.01); G11C 7/22 (2013.01); G11C 13/0002 (2013.01); G11C 13/0004 (2013.01); G11C 13/0007 (2013.01); G11C 13/0009 (2013.01); G11C 13/0011 (2013.01); G11C 13/0026 (2013.01); G11C 13/0061 (2013.01); G11C 2013/0045 (2013.01); G11C 2013/0054 (2013.01); G11C 2213/11 (2013.01); G11C 2213/31 (2013.01); G11C 2213/32 (2013.01); G11C 2213/53 (2013.01); G11C 2213/71 (2013.01); G11C 2213/77 (2013.01);
Abstract
A low read current architecture for memory. Bit lines of a cross point memory array are allowed to be charged by a selected word line until a minimum voltage differential between a memory state and a reference level is assured.