The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 07, 2016

Filed:

Mar. 30, 2015
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Chien-Hao Chen, Chuangwei Township, TW;

Shun Wu Lin, Taichung, TW;

Chi-Chun Chen, Kaohsiung, TW;

Ryan Chia-Jen Chen, Chiayi, TW;

Yi-Hsing Chen, Changhua, TW;

Matt Yeh, Hsinchun, TW;

Donald Y. Chao, Hsinchu, TW;

Kuo-Bin Huang, Jhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01); H01L 21/28 (2006.01); H01L 21/311 (2006.01); H01L 21/3213 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28105 (2013.01); H01L 21/28123 (2013.01); H01L 21/28158 (2013.01); H01L 21/31111 (2013.01); H01L 21/32139 (2013.01); H01L 29/401 (2013.01);
Abstract

Provided are methods of patterning metal gate structures including a high-k gate dielectric. In an embodiment, a soluble hard mask layer may be used to provide a masking element to pattern a metal gate. The soluble hard mask layer may be removed from the substrate by water or a photoresist developer. In an embodiment, a hard mask including a high-k dielectric is formed. In a further embodiment, a protection layer is formed underlying a photoresist pattern. The protection layer may protect one or more layers formed on the substrate from a photoresist stripping process.


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