The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 19, 2016
Filed:
Sep. 29, 2014
International Business Machines Corporation, Armonk, NY (US);
Eric C. T. Harley, Lagrangeville, NY (US);
Judson R. Holt, Wappingers Falls, NY (US);
Yue Ke, Fishkill, NY (US);
Timothy J. McArdle, Hopewell Junction, NY (US);
Shogo Mochizuki, Clifton Park, NY (US);
Alexander Reznicek, Troy, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
The present invention relates generally to semiconductor devices and more particularly, to a structure and method of forming an abrupt junction in the channel regions of high density technologies, such as tight pitch FinFET devices, using recessed source-drain (S-D) regions and annealing techniques. In an embodiment, a faceted buffer layer, deposited before the S-D region is formed, may be used to control the profile and dopant concentration of the junction under the channel. In another embodiment, the profile and dopant concentration of the junction may be controlled via a dopant concentration gradient in the S-D region.