The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 01, 2016
Filed:
Dec. 18, 2013
Intel Corporation, Santa Clara, CA (US);
Ravindranath V. Mahajan, Chandler, AZ (US);
Christopher J. Nelson, Gilbert, AZ (US);
Omkar G. Karhade, Chandler, AZ (US);
Feras Eid, Chandler, AZ (US);
Nitin A. Deshpande, Chandler, AZ (US);
Shawna M. Liff, Scottsdale, AZ (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
Embodiments of the present disclosure are directed towards an integrated circuit (IC) package having first and second dies with first and second input/output (I/O) interconnect structures, respectively. The IC package may include a bridge having first and second electrical routing features coupled to a portion of the first and second I/O interconnect structures, respectively. In embodiments, the first and second electrical routing features may be disposed on one side of the bridge; and third electrical routing features may be disposed on an opposite side. The first and second electrical routing features may be configured to route electrical signals between the first die and the second die and the third electrical routing features may be configured to route electrical signals between the one side and the opposite side. The first die, the second die, and the bridge may be embedded in electrically insulating material. Other embodiments may be described and/or claimed.