The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

May. 19, 2014
Applicant:

United Microelectronics Corporation, Hsinchu, TW;

Inventors:

Te-Hsien Hsieh, Kaohsiung, TW;

Ming-Jui Chen, Hsinchu, TW;

Cheng-Te Wang, Hsinchu County, TW;

Jing-Yi Lee, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06K 9/00 (2006.01); G06T 7/00 (2006.01); G06K 9/52 (2006.01);
U.S. Cl.
CPC ...
G06T 7/0004 (2013.01); G06K 9/52 (2013.01);
Abstract

A method for IC design is provided. Firstly, an IC design layout having a main feature with an original margin is received. Then, a first modified margin of the main feature is generated; and a first photolithography simulation procedure of the main feature with the first modified margin is performed to generate a first contour having a plurality of curves. Next, an equation of each of the curves is obtained; each equation of the curves is manipulated to obtain a vertex of each of the curves. After that, a first group of target points are assigned to the original margin. Each of the first group of target points respectively corresponds to one of the vertices. Finally, an optical proximity correction (OPC) procedure is performed by using the first group of target points to generate a second modified margin. An apparatus for IC design is also provided.


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