The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2016

Filed:

Nov. 05, 2014
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Daniel J. Dechene, Wappingers Falls, NY (US);

Geng Han, Fishkill, NY (US);

Scott M. Mansfield, Hopewell Junction, NY (US);

Stuart A. Sieg, Albany, NY (US);

Yunpeng Yin, Niskayuna, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/308 (2006.01); H01L 21/3065 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3086 (2013.01); H01L 21/3065 (2013.01); H01L 21/823431 (2013.01); H01L 29/6681 (2013.01); H01L 29/66795 (2013.01);
Abstract

A method of fabricating a semiconductor device includes forming a masking layer on an upper surface of a semiconductor substrate. The masking layer is patterned to form at least one masking element that designates an active region of the semiconductor substrate and at least one patterning assist feature adjacent the at least one masking element. An etching process is performed to form a plurality of semiconductor fins on the semiconductor substrate. The plurality of semiconductor fins include at least one isolated fin formed on the active region according to the at least one masking element and at least one sacrificial fin formed according to the patterning assist feature that reduces a loading effect that occurs during the etching process.


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