The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2016

Filed:

Aug. 17, 2009
Applicants:

Hangil Shin, Seongnam-si, KR;

Deokkyung Yang, Hanam-si, KR;

Jong-woo Ha, Seoul, KR;

Inventors:

HanGil Shin, Seongnam-si, KR;

DeokKyung Yang, Hanam-si, KR;

Jong-Woo Ha, Seoul, KR;

Assignee:

STATS ChipPAC Ltd., Singapore, SG;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/498 (2006.01); H01L 25/10 (2006.01); H01L 25/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 23/3128 (2013.01); H01L 24/48 (2013.01); H01L 25/0655 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73207 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1058 (2013.01); H01L 2225/1088 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/1815 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/30107 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a component over a side of the substrate; forming an interface module having a module via in any location for connectivity to the substrate; and mounting the entirety of the interface module over a portion of the side of the substrate next to the component.


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