The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2015

Filed:

Mar. 03, 2014
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Feng Zhou, Beacon, NY (US);

Tien-Ying Luo, Clifton Park, NY (US);

Haiting Wang, Clifton Park, NY (US);

Padmaja Nagaiah, Guilderland, NY (US);

Jean-Baptiste Laloe, Saratoga Springs, NY (US);

Isabelle Pauline Ferain, Ballston Spa, NY (US);

Yong Meng Lee, Mechanicville, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/51 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 29/401 (2013.01); H01L 21/31111 (2013.01); H01L 29/51 (2013.01); H01L 29/518 (2013.01);
Abstract

An improved method for fabricating a semiconductor device is provided. The method includes: depositing a dielectric layer on a substrate; depositing a first cap layer on the dielectric layer; depositing an etch stop layer on the dielectric layer; and depositing a dummy cap layer on the etch stop layer to form a partial gate structure. Also provided is a partially formed semiconductor device. The partially formed semiconductor device includes: a substrate; a dielectric layer on the substrate; a first cap layer on the dielectric layer; an etch stop layer on the dielectric layer; and a dummy cap layer on the etch stop layer forming a partial gate structure.


Find Patent Forward Citations

Loading…