The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 2015
Filed:
Jul. 31, 2014
Stmicroelectronics, Inc., Coppell, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Globalfoundries Inc., Grand Cayman, KY;
Qing Liu, Watervliet, NY (US);
Ruilong Xie, Schenectady, NY (US);
Xiuyu Cai, Niskayuna, NY (US);
Kejia Wang, Poughkeepsie, NY (US);
Chun-chen Yeh, Clifton Park, NY (US);
STMicroelectronics, Inc., Coppell, TX (US);
International Business Machines Corporation, Armonk, NY (US);
GlobalFoundries Inc., Grand Cayman, KY;
Abstract
Techniques and structures for shaping the source and drain junction profiles of a finFET are described. A fin may be partially recessed at the source and drain regions of the finFET. The partially recessed fin may be further recessed laterally and vertically, such that the laterally recessed portion extends under at least a portion of the finFET's gate structure. Source and drain regions of the finFET may be formed by growing a buffer layer on the etched surfaces of the fin and/or growing a source and drain layer at the source and drain regions of the fin. The lateral recess can improve channel-length uniformity along the height of the fin.