The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 10, 2015
Filed:
Mar. 14, 2014
Applicant:
Xintec Inc., Jhongli, Taoyuan County, TW;
Inventors:
Yu-Lin Yen, Taipei, TW;
Chien-Hui Chen, Zhongli, TW;
Tsang-Yu Liu, Zhubei, TW;
Long-Sheng Yeou, Hsinchu, TW;
Assignee:
XINTEC INC., Taoyuan, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/768 (2006.01); B81B 7/00 (2006.01); H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76879 (2013.01); B81B 7/007 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/49827 (2013.01); H01L 24/06 (2013.01); H01L 24/94 (2013.01); B81B 2207/07 (2013.01); B81B 2207/092 (2013.01); H01L 23/3114 (2013.01); H01L 24/32 (2013.01); H01L 2221/68377 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/05669 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/014 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01014 (2013.01); H01L 2924/01021 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01033 (2013.01); H01L 2924/01078 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/15788 (2013.01);
Abstract
A method for forming a chip package, by providing a substrate having a plurality of conducting pads below a lower surface, and a dielectric layer located between the conducting pads, forming a recess in an upper surface of the substrate, forming a hole extending through the bottom of the recess, forming an insulating layer on the sidewall of the recess and in the hole, exposing a portion of the conducting pads through the insulating layer, and forming a conducting layer on the insulating layer and through the hole to contact with the conducting pads.