The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

May. 03, 2013
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventors:

Jun-Jie Wang, Changhua County, TW;

Po-Chao Tsao, New Taipei, TW;

Chia-Jui Liang, Tainan, TW;

Shih-Fang Tzou, Tainan, TW;

Chien-Ting Lin, Hsinchu, TW;

Cheng-Guo Chen, Changhua County, TW;

Ssu-I Fu, Kaohsiung, TW;

Yu-Hsiang Hung, Tainan, TW;

Chung-Fu Chang, Tainan, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4966 (2013.01); H01L 29/51 (2013.01); H01L 29/66545 (2013.01); H01L 29/66628 (2013.01);
Abstract

A replacement gate process is disclosed. A substrate and a dummy gate structure formed on the substrate is provided, wherein the dummy gate structure comprises a dummy layer on the substrate, a hard mask layer on the dummy layer, spacers at two sides of the dummy layer and the hard mask layer, and a contact etch stop layer (CESL) covering the substrate, the spacers and the hard mask layer. The spacers and the CESL are made of the same material. Then, a top portion of the CESL is removed to expose the hard mask layer. Next, the hard mask layer is removed. Afterward, the dummy layer is removed to form a trench.


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