The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 13, 2015

Filed:

Sep. 13, 2013
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Timothy H. Daubenspeck, Colchester, VT (US);

Jeffrey P. Gambino, Westford, VT (US);

Ekta Misra, Fishkill, NY (US);

Christopher D. Muzzy, Burlington, VT (US);

Wolfgang Sauter, Richmond, VT (US);

Assignee:

GLOBALFOUNDRIES, INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 24/11 (2013.01);
Abstract

Solder bump connections and methods for fabricating solder bump connections. A passivation layer is formed on a dielectric layer. A via opening extends through the passivation layer from a top surface of the passivation layer to a metal line in the dielectric layer. A mask on the top surface of the passivation layer includes a mask opening that is aligned with the via opening. A conductive layer is selectively formed in the via opening and the mask opening. The conductive layer projects above the top surface of the passivation layer. The method further includes planarizing the passivation layer and the conductive layer to define a plug in the via opening that is coupled with the metal line.


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