The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 2015

Filed:

Jan. 31, 2012
Applicants:

Sam Ziqun Zhao, Irvine, CA (US);

Kevin Kunzhong HU, Irvine, CA (US);

Sampath K. V. Karikalan, Irvine, CA (US);

Rezaur Rahman Khan, Rancho Santa Margarita, CA (US);

Pieter Vorenkamp, Laguna Niguel, CA (US);

Xiangdong Chen, Irvine, CA (US);

Inventors:

Sam Ziqun Zhao, Irvine, CA (US);

Kevin Kunzhong Hu, Irvine, CA (US);

Sampath K. V. Karikalan, Irvine, CA (US);

Rezaur Rahman Khan, Rancho Santa Margarita, CA (US);

Pieter Vorenkamp, Laguna Niguel, CA (US);

Xiangdong Chen, Irvine, CA (US);

Assignee:

BROADCOM CORPORATION, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); H01L 21/66 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); H01L 21/561 (2013.01); H01L 23/3128 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01L 24/16 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/97 (2013.01);
Abstract

An exemplary implementation of the present disclosure includes a testable semiconductor package that includes an active die having interface contacts and dedicated testing contacts. An interposer is situated adjacent a bottom surface of the active die, the interposer providing electrical connections between the interface contacts and a bottom surface of the testable semiconductor package. At least one conductive medium provides electrical connection between at least one of the dedicated testing contacts and a top surface of the testable semiconductor package. The at least one conductive medium can be coupled to a package-top testing connection, which may include a solder ball.


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