The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 22, 2015

Filed:

Jul. 28, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Gregory E. Howard, Plano, TX (US);

Bernardo Gallegos, McKinney, TX (US);

Rajiv Dunne, San Diego, CA (US);

Darvin R. Edwards, Garland, TX (US);

Siva P. Gurrum, Allen, TX (US);

Manu J. Prakuzhy, Allen, TX (US);

Donald C. Abbott, Chartley, MA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/495 (2006.01); H01L 21/78 (2006.01); H01L 21/56 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49589 (2013.01); H01L 21/4825 (2013.01); H01L 21/4828 (2013.01); H01L 21/561 (2013.01); H01L 21/78 (2013.01); H01L 23/4952 (2013.01); H01L 23/49503 (2013.01);
Abstract

A method for fabricating a packaged semiconductor device begins by placing a first mask on a foil of porous conductive material bonded on a strip of a first metal. The surface of the conductive material and the inside of the pores are oxidized. The first mask leaves areas unprotected. The pores of the unprotected areas are filled with a conductive polymeric compound. A layer of a second metal is deposited on the conductive polymeric compound in the unprotected areas. The first mask is removed to expose un-oxidized conductive material. The foil thickness of the un-oxidized conductive material is removed to expose the underlying first metal. This creates sidewalls of the foil and leaves un-removed the capacitor areas covered by the second metal. A second mask is placed on the strip, the second mask defines a plurality of leadframes having chip pads and leads, and protecting the capacitor areas. The portions of the first metal exposed by the second mask are removed. Sidewalls of the first metal are coplanar with the foil sidewalls. The second mask is removed.


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