The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2015

Filed:

Nov. 25, 2013
Applicants:

Lakshminarayan Viswanathan, Phoenix, AZ (US);

L. M. Mahalingam, Scottsdale, AZ (US);

David F. Abdo, Scottsdale, AZ (US);

Jaynal A. Molla, Gilbert, AZ (US);

Inventors:

Lakshminarayan Viswanathan, Phoenix, AZ (US);

L. M. Mahalingam, Scottsdale, AZ (US);

David F. Abdo, Scottsdale, AZ (US);

Jaynal A. Molla, Gilbert, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/50 (2006.01); H01L 21/48 (2006.01); H01L 21/44 (2006.01); H01L 23/00 (2006.01); H05K 1/14 (2006.01); B23K 20/02 (2006.01); B23K 35/02 (2006.01); B23K 20/24 (2006.01); B23K 20/16 (2006.01); B23K 20/10 (2006.01); B23K 20/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/83 (2013.01); B23K 20/002 (2013.01); B23K 20/023 (2013.01); B23K 20/10 (2013.01); B23K 20/16 (2013.01); B23K 20/24 (2013.01); B23K 35/0244 (2013.01); H05K 1/144 (2013.01); H01L 2224/8384 (2013.01); H01L 2224/83203 (2013.01);
Abstract

An embodiment of a method of attaching a semiconductor die to a substrate includes placing a bottom surface of the die over a top surface of the substrate with an intervening die attach material. The method further includes contacting a top surface of the semiconductor die and the top surface of the substrate with a conformal structure that includes a non-solid, pressure transmissive material, and applying a pressure to the conformal structure. The pressure is transmitted by the non-solid, pressure transmissive material to the top surface of the semiconductor die. The method further includes, while applying the pressure, exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter. Before placing the die over the substrate, conductive mechanical lock features may be formed on the top surface of the substrate, and/or on the bottom surface of the semiconductor die.


Find Patent Forward Citations

Loading…