The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2015

Filed:

Aug. 12, 2013
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Ulrich Wachter, Regenburg, DE;

Veronika Huber, Bad Abbach, DE;

Thomas Kilger, Regenstauf, DE;

Ralf Otremba, Kaufbeuren, DE;

Bernd Stadler, Donaustauf, DE;

Dominic Maier, Pleystein, DE;

Klaus Schiess, Allensbach, DE;

Andreas Schlögl, Ottobrunn, DE;

Uwe Wahl, München, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/00 (2006.01); H01L 23/36 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 23/36 (2013.01); H01L 23/49562 (2013.01); H01L 24/24 (2013.01); H01L 24/25 (2013.01); H01L 24/49 (2013.01); H01L 24/85 (2013.01); H01L 21/568 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/2518 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/18162 (2013.01);
Abstract

A semiconductor package is manufactured by providing a semiconductor die with a terminal at a first side of the die, providing a material coupled to the die at an opposing second side of the die and embedding the die in a molding compound so that the die is covered by the molding compound on all sides except the first side. The molding compound is thinned at a side of the molding compound adjacent the second side of the die, to expose the material at the second side of the die without exposing the second side of the die. An electrical connection is formed to the terminal at the first side of the die. In the case of a transistor die, the terminal can be a source terminal and the transistor die can be attached source-down to a metal block such as a die paddle of a lead frame.


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