The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2015

Filed:

Aug. 01, 2013
Applicant:

Shanghai Hua Hong Nec Electronics Co., Ltd., Shanghai, CN;

Inventors:

Juanjuan Li, Shanghai, CN;

Wensheng Qian, Shanghai, CN;

Feng Han, Shanghai, CN;

Pengliang Ci, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7816 (2013.01); H01L 29/66681 (2013.01); H01L 29/402 (2013.01); H01L 29/4175 (2013.01); H01L 29/66659 (2013.01); H01L 29/7835 (2013.01); H01L 29/0847 (2013.01); H01L 29/086 (2013.01); H01L 29/1045 (2013.01);
Abstract

A radio frequency (RF) laterally diffused metal oxide semiconductor (LDMOS) device is disclosed, wherein a lightly doped n-type drain region has a laterally non-uniform n-type dopant concentration distribution, which is achieved by forming a moderately n-type doped region, having a higher doping concentration and a greater depth than the rest portion of the lightly doped n-type drain region, in a portion of the lightly n-type doped region proximate to the polysilicon gate. The structure enables the RF LDMOS device of the present invention to have both a high breakdown voltage and a significantly reduced on-resistance. A method of fabricating such a RF LDMOS device is also disclosed.


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