The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 04, 2014

Filed:

Nov. 23, 2011
Applicants:

Chia-sheng Lin, Taoyuan County, TW;

Chien-hui Chen, Taoyuan County, TW;

Bing-siang Chen, Taipei, TW;

Tzu-hsiang Hung, Taoyuan County, TW;

Inventors:

Chia-Sheng Lin, Taoyuan County, TW;

Chien-Hui Chen, Taoyuan County, TW;

Bing-Siang Chen, Taipei, TW;

Tzu-Hsiang Hung, Taoyuan County, TW;

Assignee:

Xintec Inc., Jhongli, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/50 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76898 (2013.01); H01L 23/5225 (2013.01);
Abstract

A substrate structure with through vias is provided. The substrate structure with through vias includes a semiconductor substrate having a back surface and a via penetrating the back surface, a metal layer, a first insulating layer and a second insulating layer. The first insulating layer is formed on the back surface of the semiconductor substrate and has an opening connected to the through via. The second insulating layer is formed on the first insulating layer and has a portion extending into the opening and the via to form a trench insulating layer. The bottom of the trench insulating layer is etched back to form a footing portion at the corner of the via. The footing portion has a height less than a total height of the first and second insulating layers.


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