The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 2014

Filed:

Jan. 23, 2013
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Kuo-Yin Lin, Jhubei, TW;

Wan-Chun Pan, Hsin-Chu, TW;

Hsiang-Pi Chang, New Taipei, TW;

Teng-Chun Tsai, Tainan, TW;

Chi-Yuan Chen, Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/302 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method includes performing a first planarization step to remove portions of a semiconductor region over isolation regions. The first planarization step has a first selectivity, with the first selectivity being a ratio of a first removal rate of the semiconductor region to a second removal rate of the isolation regions. After the isolation regions are exposed, a second planarization step is performed on the isolation regions and a portion of the semiconductor region between the isolation regions. The second planarization step has a second selectivity lower than the first selectivity, with the second selectivity being a ratio of a third removal rate of the portion of semiconductor region to a fourth removal rate of the isolation regions.


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