The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 2014
Filed:
Mar. 22, 2011
Po-jui Liao, Taichung, TW;
Tsung-lung Tsai, Tai-Nan, TW;
Chien-ting Lin, Hsinchu, TW;
Shao-hua Hsu, Taoyuan County, TW;
Yi-wei Chen, Taichung, TW;
Hsin-fu Huang, Tainan, TW;
Tzung-ying Lee, Ping-Tung County, TW;
Min-chuan Tsai, New Taipei, TW;
Chan-lon Yang, Taipei, TW;
Chun-yuan Wu, Yunlin County, TW;
Teng-chun Tsai, Tainan, TW;
Guang-yaw Hwang, Tainan, TW;
Chia-lin Hsu, Tainan, TW;
Jie-ning Yang, Ping-Tung County, TW;
Cheng-guo Chen, Changhua County, TW;
Jung-tsung Tseng, Tainan, TW;
Zhi-cheng Lee, Tainan, TW;
Hung-ling Shih, Chiayi County, TW;
Po-cheng Huang, Chiayi, TW;
Yi-wen Chen, Tainan, TW;
Che-hua Hsu, Hsinchu County, TW;
Po-Jui Liao, Taichung, TW;
Tsung-Lung Tsai, Tai-Nan, TW;
Chien-Ting Lin, Hsinchu, TW;
Shao-Hua Hsu, Taoyuan County, TW;
Yi-Wei Chen, Taichung, TW;
Hsin-Fu Huang, Tainan, TW;
Tzung-Ying Lee, Ping-Tung County, TW;
Min-Chuan Tsai, New Taipei, TW;
Chan-Lon Yang, Taipei, TW;
Chun-Yuan Wu, Yunlin County, TW;
Teng-Chun Tsai, Tainan, TW;
Guang-Yaw Hwang, Tainan, TW;
Chia-Lin Hsu, Tainan, TW;
Jie-Ning Yang, Ping-Tung County, TW;
Cheng-Guo Chen, Changhua County, TW;
Jung-Tsung Tseng, Tainan, TW;
Zhi-Cheng Lee, Tainan, TW;
Hung-Ling Shih, Chiayi County, TW;
Po-Cheng Huang, Chiayi, TW;
Yi-Wen Chen, Tainan, TW;
Che-Hua Hsu, Hsinchu County, TW;
United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.