The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 2014

Filed:

Nov. 28, 2011
Applicants:

Alan B. Botula, Essex Junction, VT (US);

William F. Clark, Jr., Essex Junction, VT (US);

Richard A. Phelps, Colchester, VT (US);

Bethann Rainey, Williston, VT (US);

Yun Shi, South Burlington, VT (US);

James A. Slinkman, Montpelier, VT (US);

Inventors:

Alan B. Botula, Essex Junction, VT (US);

William F. Clark, Jr., Essex Junction, VT (US);

Richard A. Phelps, Colchester, VT (US);

BethAnn Rainey, Williston, VT (US);

Yun Shi, South Burlington, VT (US);

James A. Slinkman, Montpelier, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor structure includes a semiconductor-on-insulator substrate, the semiconductor-on-insulator substrate comprising a handle wafer, a buried oxide (BOX) layer on top of the handle wafer, and a top silicon layer on top of the BOX layer; and an implantation region located in the top silicon layer, the implantation region comprising a noble gas.


Find Patent Forward Citations

Botula, Alan. (2014). Noble gas implantation region in top silicon layer of semiconductor-on-insulator substrate (U.S. Patent No. 8748285). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8748285

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…