The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 15, 2014

Filed:

Sep. 28, 2011
Applicants:

Dongping Wu, Shanghai, CN;

Jun Luo, Shangahi, CN;

Yinghua Piao, Shanghai, CN;

Zhiwei Zhu, Shanghai, CN;

Shili Zhang, Uppsala, SE;

Wei Zhang, Shanghai, CN;

Inventors:

Dongping Wu, Shanghai, CN;

Jun Luo, Shangahi, CN;

Yinghua Piao, Shanghai, CN;

Zhiwei Zhu, Shanghai, CN;

Shili Zhang, Uppsala, SE;

Wei Zhang, Shanghai, CN;

Assignee:

Fudan University, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01); H01L 21/338 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of making a transistor, comprising: providing a semiconductor substrate; forming a gate stack over the semiconductor substrate; forming an insulating layer over the semiconductor substrate; forming a depleting layer over the insulating layer; etching the depleting layer and the insulating layer; forming a metal layer over the semiconductor substrate; performing thermal annealing; and removing the metal layer. As advantages of the present invention, an upper outside part of each of the sidewalls include a material that can react with the metal layer, so that metal on two sides of the sidewalls is absorbed during the annealing process, preventing the metal from diffusing toward the semiconductor layer, and ensuring that the formed Schottky junctions can be ultra-thin and uniform, and have controllable and suppressed lateral growth.


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