The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2014

Filed:

Jan. 04, 2012
Applicants:

Chi-mao Hsu, Tainan, TW;

Hsin-fu Huang, Tainan, TW;

Chin-fu Lin, Tainan, TW;

Min-chuan Tsai, New Taipei, TW;

Wei-yu Chen, Tainan, TW;

Chien-hao Chen, Yun-Lin County, TW;

Inventors:

Chi-Mao Hsu, Tainan, TW;

Hsin-Fu Huang, Tainan, TW;

Chin-Fu Lin, Tainan, TW;

Min-Chuan Tsai, New Taipei, TW;

Wei-Yu Chen, Tainan, TW;

Chien-Hao Chen, Yun-Lin County, TW;

Assignee:

United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01); H01L 21/4763 (2006.01); H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a method of forming a semiconductor device having a metal gate. A substrate is provided and a gate dielectric and a work function metal layer are formed thereon, wherein the work function metal layer is on the gate dielectric layer. Then, a top barrier layer is formed on the work function metal layer. The step of forming the top barrier layer includes increasing a concentration of a boundary protection material in the top barrier layer. Lastly, a metal layer is formed on the top barrier layer. The present invention further provides a semiconductor device having a metal gate.


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