The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2014
Filed:
Jun. 20, 2011
Ming-chang Hsieh, Jhudong Township, Hsinchu County, TW;
Hung-lin Chen, Pingtung, TW;
Hsiu-mei Yu, Hsinchu, TW;
Chin Kun Lan, Hsin Chu, TW;
Dong-lung Lee, Kaohsiung, TW;
Ming-Chang Hsieh, Jhudong Township, Hsinchu County, TW;
Hung-Lin Chen, Pingtung, TW;
Hsiu-Mei Yu, Hsinchu, TW;
Chin Kun Lan, Hsin Chu, TW;
Dong-Lung Lee, Kaohsiung, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
The present disclosure provides a method of making an integrated circuit (IC) device. The method includes forming a first IC feature and a second IC feature in a semiconductor substrate, the first and second IC features being spaced from each other and separated by a scribe region; forming, in the semiconductor substrate, a doped routing feature at least partially within the scribe region and configured to connect the first and second IC features; forming a multilayer interconnect (MLI) structure and an interlayer dielectric (ILD) on the semiconductor substrate, wherein the MLI is configured to be absent within the scribe region; and etching the ILD and the semiconductor substrate within the scribe region to form a scribe-line trench.