The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2014
Filed:
Dec. 15, 2011
Ssu-i Fu, Kaohsiung, TW;
Wen-tai Chiang, Tainan, TW;
Ying-tsung Chen, Kaohsiung, TW;
Shih-hung Tsai, Tainan, TW;
Chien-ting Lin, Hsinchu, TW;
Chi-mao Hsu, Tainan, TW;
Chin-fu Lin, Tainan, TW;
Ssu-I Fu, Kaohsiung, TW;
Wen-Tai Chiang, Tainan, TW;
Ying-Tsung Chen, Kaohsiung, TW;
Shih-Hung Tsai, Tainan, TW;
Chien-Ting Lin, Hsinchu, TW;
Chi-Mao Hsu, Tainan, TW;
Chin-Fu Lin, Tainan, TW;
United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;
Abstract
A manufacturing method for semiconductor device having metal gate includes providing a substrate having a first semiconductor device and a second semiconductor device formed thereon, the first semiconductor device having a first gate trench and the second semiconductor device having a second gate trench; sequentially forming a high dielectric constant (high-k) gate dielectric layer and a multiple metal layer on the substrate; forming a first work function metal layer in the first gate trench; performing a first pull back step to remove a portion of the first work function metal layer from the first gate trench; forming a second work function metal layer in the first gate trench and the second gate trench; and performing a second pull back step to remove a portion of the second work function metal layer from the first gate trench and the second gate trench.