The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2014

Filed:

Dec. 08, 2011
Applicants:

Chen-han Lin, Taichung Hsien, TW;

Hong-da Chang, Taichung Hsien, TW;

Cheng-hsiang Liu, Taichung Hsien, TW;

Hsin-yi Liao, Taichung Hsien, TW;

Shih-kuang Chiu, Taichung Hsien, TW;

Inventors:

Chen-Han Lin, Taichung Hsien, TW;

Hong-Da Chang, Taichung Hsien, TW;

Cheng-Hsiang Liu, Taichung Hsien, TW;

Hsin-Yi Liao, Taichung Hsien, TW;

Shih-Kuang Chiu, Taichung Hsien, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A fabrication method of a package structure having MEMS elements includes: disposing a plate on top of a wafer having MEMS elements and second alignment keys; cutting the plate to form therein a plurality of openings exposing the second alignment keys; performing a wire bonding process and disposing block bodies corresponding to the second alignment keys, respectively; forming an encapsulant and partially removing the encapsulant and the block bodies from the top of the encapsulant; and aligning through the second alignment keys so as to form on the encapsulant a plurality of metal traces. The present invention eliminates the need to form through holes in a silicon substrate as in the prior art so as to reduce the fabrication costs. Further, since the plate only covers the MEMS elements and the encapsulant is partially removed, the overall thickness and size of the package structure are reduced.


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