The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2013
Filed:
Dec. 22, 2011
Che-hao Tu, Hsinchu, TW;
Chi-jen Liu, Taipei, TW;
Tzu-chung Wang, Shengang Township, Taichung County, TW;
Weilun Hong, Hsinchu, TW;
Ying-tsung Chen, Hsinchu, TW;
Liang-guang Chen, Hsinchu, TW;
Che-Hao Tu, Hsinchu, TW;
Chi-Jen Liu, Taipei, TW;
Tzu-Chung Wang, Shengang Township, Taichung County, TW;
Weilun Hong, Hsinchu, TW;
Ying-Tsung Chen, Hsinchu, TW;
Liang-Guang Chen, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a first gate structure over an iso region of a substrate and a second gate structure over a dense region of the substrate. The dense region has a greater pattern density than the iso region. The first and second gate structures each have a respective hard mask disposed thereon. The method includes removing the hard masks from the first and second gate structures. The removal of the hard mask from the second gate structure causes an opening to be formed in the second gate structure. The method includes performing a deposition process followed by a first polishing process to form a sacrificial component in the opening. The method includes performing a second polishing process to remove the sacrificial component and portions of the first and second gate structures.