The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2013
Filed:
Sep. 29, 2008
Sung IL Chung, Pohang-si, KR;
Sergey Alexandrovich Nikiforov, Miryang-si, KR;
Hyeon Seok OH, Suwon-si, KR;
Pan Kyeom Kim, Miryang-si, KR;
Hyeon Taeg Gim, Miryang-si, KR;
Jeong Woo Jeon, Changwon-si, KR;
Sung Il Chung, Pohang-si, KR;
Sergey Alexandrovich Nikiforov, Miryang-si, KR;
Hyeon Seok Oh, Suwon-si, KR;
Pan Kyeom Kim, Miryang-si, KR;
Hyeon Taeg Gim, Miryang-si, KR;
Jeong Woo Jeon, Changwon-si, KR;
Korea Electrotechnology Research Institute, Gyeongsangnam-do, KR;
New Optics, Ltd., Gyeonggi-do, KR;
Abstract
The present invention relates to an inductively coupled plasma processing chamber and method for a cylindrical workpiece with a three-dimensional profile, and more particularly to an inductively coupled plasma processing reactor and method for a cylindrical workpiece with a three-dimensional profile, in which the workpiece serving as an internal RF antenna is connected to an RF power source through an impedance matching network at one end, and a terminating capacitor at another end so as to achieve low plasma contamination, confine dense uniform plasma in the substrate vicinity and suppress secondary electrons emitted from the substrate, and a plasma process can be applied to a 3-D linear semiconductor device, a metal, glass, ceramic or polymer substrate having planar or 3-D structured micro or nano patterns, and the like.