The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2013
Filed:
Jul. 05, 2011
Chung Yu Wang, Hsin-Chu, TW;
Kung-chen Yeh, Taichung, TW;
Chih-wei Wu, Zhuangwei Township, TW;
Szu Wei LU, Hsin-Chu, TW;
Jing-cheng Lin, Hsin-Chu, TW;
Chung Yu Wang, Hsin-Chu, TW;
Kung-Chen Yeh, Taichung, TW;
Chih-Wei Wu, Zhuangwei Township, TW;
Szu Wei Lu, Hsin-Chu, TW;
Jing-Cheng Lin, Hsin-Chu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
Methods and apparatus for performing dicing of die on wafer interposers. Methods are disclosed that include receiving an interposer assembly including one or more integrated circuit dies mounted on a die side of an interposer substrate and having scribe areas defined in spaces between the integrated circuit dies, the interposer having an opposite side for receiving external connectors; mounting the die side of the interposer assembly to a tape assembly, the tape assembly comprising an adhesive tape and preformed spacers disposed between and filling gaps between the integrated circuit dies; and sawing the interposer assembly by cutting the opposite side of the interposer in the scribe areas to make cuts through the interposer, the cuts separating the interposer into one or more die on wafer assemblies. Apparatuses are disclosed for use with the methods.