The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 28, 2013
Filed:
Dec. 20, 2010
Chen-hua Yu, Hsin-Chu, TW;
Chen-nan Yeh, Hsi-Chih, TW;
Chih-hsiang Yao, Taipei, TW;
Wen-kai Wan, Hsin-Chu, TW;
Jye-yen Cheng, Taichung, TW;
Chen-Hua Yu, Hsin-Chu, TW;
Chen-Nan Yeh, Hsi-Chih, TW;
Chih-Hsiang Yao, Taipei, TW;
Wen-Kai Wan, Hsin-Chu, TW;
Jye-Yen Cheng, Taichung, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method for an integrated circuit structure includes providing a semiconductor substrate; forming a metallization layer over the semiconductor substrate; forming a first dielectric layer between the semiconductor substrate and the metallization layer; forming a second dielectric layer between the semiconductor substrate and the metallization layer, wherein the second dielectric layer is over the first dielectric layer; and forming a contact plug with an upper portion substantially in the second dielectric layer and a lower portion substantially in the first dielectric layer. The contact plug is electrically connected to a metal line in the metallization layer. The contact plug is discontinuous at an interface between the upper portion and the lower portion.