The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 2013
Filed:
Jul. 07, 2011
Hung-jen Lee, Taipei, TW;
Shu-ming Chang, New Taipei, TW;
Chen-han Chiang, Luodong Township, TW;
Tsang-yu Liu, Zhubei, TW;
Yen-shih Ho, Kaohsiung, TW;
Hung-Jen Lee, Taipei, TW;
Shu-Ming Chang, New Taipei, TW;
Chen-Han Chiang, Luodong Township, TW;
Tsang-Yu Liu, Zhubei, TW;
Yen-Shih Ho, Kaohsiung, TW;
Other;
Abstract
An embodiment of the present invention provides a manufacturing method of a chip package structure including: providing a first substrate having a plurality of predetermined scribe lines defined thereon, wherein the predetermined scribe lines define a plurality of device regions; bonding a second substrate to the first substrate, wherein a spacing layer is disposed therebetween and has a plurality of chip support rings located in the device regions respectively and a cutting support structure located on peripheries of the chip support rings, and the spacing layer has a gap pattern separating the cutting support structure from the chip support rings; and cutting the first substrate and the second substrate to form a plurality of chip packages. Another embodiment of the present invention provides a chip package structure.