The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2013

Filed:

Oct. 27, 2011
Applicants:

Kangguo Cheng, Schenectady, NY (US);

Joseph Ervin, Wappingers Falls, NY (US);

Jeffrey B. Johnson, Essex Junction, VT (US);

Pranita Kulkarni, Slingerlands, NY (US);

Kevin Mcstay, Hopewell Junction, NY (US);

Paul C. Parries, Beacon, NY (US);

Chengwen Pei, Danbury, CT (US);

Geng Wang, Stormville, NY (US);

Yanli Zhang, San Jose, CA (US);

Inventors:

Kangguo Cheng, Schenectady, NY (US);

Joseph Ervin, Wappingers Falls, NY (US);

Jeffrey B. Johnson, Essex Junction, VT (US);

Pranita Kulkarni, Slingerlands, NY (US);

Kevin McStay, Hopewell Junction, NY (US);

Paul C. Parries, Beacon, NY (US);

Chengwen Pei, Danbury, CT (US);

Geng Wang, Stormville, NY (US);

Yanli Zhang, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device structure having an isolation region and method of manufacturing the same are provided. The semiconductor device structure includes a silicon-on-insulator (SOI) substrate. A plurality of gates is formed on the SOI substrate. The semiconductor device structure further includes trenches having sidewalls, formed between each of the plurality of gates. The semiconductor device structure further includes an epitaxial lateral growth layer formed in the trenches. The epitaxial lateral growth layer is grown laterally from the opposing sidewalls of the trenches, so that the epitaxial lateral growth layer encloses a portion of the trenches extended into the SOI substrate. The epitaxial lateral growth layer is formed in such way that it includes an air gap region overlying a buried dielectric layer of the SOI substrate.


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