The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2013
Filed:
May. 30, 2008
Won Gi Min, Chandler, AZ (US);
Hongzhong Xu, Gilbert, AZ (US);
Zhihong Zhang, Tempe, AZ (US);
Jiang-kai Zuo, Chandler, AZ (US);
Won Gi Min, Chandler, AZ (US);
Hongzhong Xu, Gilbert, AZ (US);
Zhihong Zhang, Tempe, AZ (US);
Jiang-Kai Zuo, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
Breakdown voltage BVdss is enhanced and ON-resistance reduced in RESURF devices (), e.g., LDMOS transistors, by careful charge balancing, even when body () and drift () region charge balance is not ideal, by: (i) providing a plug or sinker () near the drain () and of the same conductivity type extending through the drift region () at least into the underlying body region (), and/or (ii) applying bias Viso to a surrounding lateral doped isolation wall () coupled to the device buried layer (), and/or (iii) providing a variable resistance bridge () between the isolation wall () and the drift region (). The bridge () may be a FET () whose source-drain () couple the isolation wall () and drift region () and whose gate () receives control voltage Vc, or a resistor () whose cross-section (X, Y, Z) affects its resistance and pinch-off, to set the percentage of drain voltage coupled to the buried layer () via the isolation wall ().