The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2012
Filed:
Sep. 30, 2008
Masakazu Ishino, Tokyo, JP;
Hiroaki Ikeda, Tokyo, JP;
Hideharu Miyake, Tokyo, JP;
Shiro Uchiyama, Tokyo, JP;
Hiroyuki Tenmei, Tokyo, JP;
Kunihiko Nishi, Tokyo, JP;
Yasuhiro Naka, Tokyo, JP;
Nae Hisano, Tokyo, JP;
Masakazu Ishino, Tokyo, JP;
Hiroaki Ikeda, Tokyo, JP;
Hideharu Miyake, Tokyo, JP;
Shiro Uchiyama, Tokyo, JP;
Hiroyuki Tenmei, Tokyo, JP;
Kunihiko Nishi, Tokyo, JP;
Yasuhiro Naka, Tokyo, JP;
Nae Hisano, Tokyo, JP;
Elpida Memory, Inc., Tokyo, JP;
Abstract
A wafer (or a circuit board), which is used to perform three-dimensional mounting, has protrusionwhich is provided in low melting point metalfor electrically connecting mutually joined wafersand, and which defines an interval between mutually joined wafersandwithout being deformed at the time when low melting point metalis melted. A joining structure of wafersandis manufactured by using wafersand, at least one of which has protrusion. In the manufactured joining structure of wafersand, wafersandare electrically connected to each other by low melting point metal, and protrusion, which defines the interval between wafersandwithout being deformed at the time when low melting point metalis melted, is provided in low melting point metal