The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 18, 2012
Filed:
Apr. 12, 2011
Jian-hao Chen, Hsinchu, TW;
Wei-yang Lee, Taipei, TW;
Wei-yeh Tang, Yangmei, TW;
Xiong-fei Yu, Hsinchu, TW;
Kuang-yuan Hsu, Fongyuan, TW;
Jian-Hao Chen, Hsinchu, TW;
Wei-Yang Lee, Taipei, TW;
Wei-Yeh Tang, Yangmei, TW;
Xiong-Fei Yu, Hsinchu, TW;
Kuang-Yuan Hsu, Fongyuan, TW;
Abstract
The invention relates to integrated circuit fabrication, and more particularly to a semiconductor device with a plurality of gate structures. An exemplary method of fabricating the plurality of gate structures comprises providing a silicon substrate; depositing a dummy oxide layer over the substrate; depositing a dummy gate electrode layer over the dummy oxide layer; patterning the layers to define a plurality of dummy gates; forming nitrogen-containing sidewall spacers on the plurality of dummy gates; forming an interlayer dielectric layer between the nitrogen-containing sidewall spacers; selectively depositing a hard mask layer on the interlayer dielectric layer by an atomic layer deposition (ALD) process; removing the dummy gate electrode layer; removing the dummy oxide layer; depositing a gate dielectric; and depositing a gate electrode.