The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2012

Filed:

Jan. 12, 2011
Applicants:

David Wei Wang, Hsinchu, TW;

An-hong Liu, Hsinchu, TW;

Hsiang-ming Huang, Hsinchu, TW;

Jar-dar Yang, Hsinchu, TW;

Yi-chang Lee, Hsinchu, TW;

Inventors:

David Wei Wang, Hsinchu, TW;

An-Hong Liu, Hsinchu, TW;

Hsiang-Ming Huang, Hsinchu, TW;

Jar-Dar Yang, Hsinchu, TW;

Yi-Chang Lee, Hsinchu, TW;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A multi-chip stack package structure comprises a substrate, which has a chip placement area defined on its upper surface and a plurality of contacts disposed outside the chip placement area; a first chip is disposed in the chip placement area with the rear surface, a plurality of first pads being disposed on the active surface and a plurality of first bumps each being formed on one of the first pads; a plurality of metal wires connect the first bumps to the contacts; a second chip with a plurality of second pads being disposed on the active surface and a plurality of second bumps each being formed on one of the second pads, the second chip being mounted to the first chip with its active surface facing the active surface of the first chip, wherein the second bumps correspondingly connect the metal wires and the first bumps respectively.


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