The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 2011
Filed:
Nov. 24, 2010
Uday Shah, Portland, OR (US);
Brian Doyle, Portland, OR (US);
Justin K. Brask, Portland, OR (US);
Robert S. Chau, Beaverton, OR (US);
Thomas A. Letson, Beaverton, OR (US);
Uday Shah, Portland, OR (US);
Brian Doyle, Portland, OR (US);
Justin K. Brask, Portland, OR (US);
Robert S. Chau, Beaverton, OR (US);
Thomas A. Letson, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A nonplanar semiconductor device having a semiconductor body formed on an insulating layer of a substrate. The semiconductor body has a top surface opposite a bottom surface formed on the insulating layer and a pair of laterally opposite sidewalls wherein the distance between the laterally opposite sidewalls at the top surface is greater than at the bottom surface. A gate dielectric layer is formed on the top surface of the semiconductor body and on the sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric layer on the top surface and sidewalls of the semiconductor body. A pair of source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.