The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2011
Filed:
Jul. 26, 2007
Darrell Rinerson, Cupertino, CA (US);
Julie Casperson Brewer, Santa Clara, CA (US);
Christophe J. Chevallier, Palo Alto, CA (US);
Wayne Kinney, Emmett, ID (US);
Roy Lambertson, Los Altos, CA (US);
Lawrence Schloss, Palo Alto, CA (US);
Darrell Rinerson, Cupertino, CA (US);
Julie Casperson Brewer, Santa Clara, CA (US);
Christophe J. Chevallier, Palo Alto, CA (US);
Wayne Kinney, Emmett, ID (US);
Roy Lambertson, Los Altos, CA (US);
Lawrence Schloss, Palo Alto, CA (US);
Abstract
A threshold device including a plurality of adjacent tunnel barrier layers that are in contact with one another and are made from a plurality of different dielectric materials is disclosed. A memory plug having first and second terminals includes, electrically in series with the first and second terminals, the threshold device and a memory element that stores data as a plurality of conductivity profiles. The threshold device is operative to impart a characteristic I-V curve that defines current flow through the memory element as a function of applied voltage across the terminals during data operations. The threshold device substantially reduces or eliminates current flow through half-selected or un-selected memory plugs and allows a sufficient magnitude of current to flow through memory plugs that are selected for read and write operations. The threshold device reduces or eliminates data disturb in half-selected memory plugs and increases S/N ratio during read operations.