The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 02, 2011
Filed:
Oct. 23, 2008
Chien-hao Chen, Chuangwei Township, Ilan County, TW;
Yong-tian Hou, Singapore, TW;
Peng-fu Hsu, Hsinchu, TW;
Kuo-tai Huang, Hsinchu, TW;
Donald Y. Chao, Hsinchu, TW;
Cheng-lung Hung, Hsinchu, TW;
Chien-Hao Chen, Chuangwei Township, Ilan County, TW;
Yong-Tian Hou, Singapore, TW;
Peng-Fu Hsu, Hsinchu, TW;
Kuo-Tai Huang, Hsinchu, TW;
Donald Y. Chao, Hsinchu, TW;
Cheng-Lung Hung, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method is provided that allows for maintaining a desired equivalent oxide thickness (EOT) by reducing the thickness of an interfacial layer in a gate structure. An interfacial layer is formed on a substrate, a gate dielectric layer such as, a high-k gate dielectric, is formed on the interfacial layer. A gettering layer is formed on the substrate overlying the interfacial layer. The gettering layer may function to getter oxygen from the interfacial layer such that the interfacial layer thickness is decreased and/or restricted from growth.